1. Field of the Invention
The present invention relates to a semiconductor memory device, for example, a NAND flash memory device.
2. Related Art
Semiconductor memory devices are widely used in computers, home electric appliances, portable telephones and the like. An EEPROM (Electrically Erasable and Programmable Read Only Memory) type nonvolatile memory device typified by a NAND flash memory has been generally used as a storage medium of a personal computer, a digital camera, a digital video recorder, a digital television, an MP3 or a portable device.
Furthermore, because of its excellence as large capacity and high integration, the NAND flash memory has been lately used to replace a hard disk drive (HDD). If the NAND flash memory is used to replace the hard disk drive, such problems as data deterioration resulting from read disturbance and physical deterioration in a gate dielectric film resulting from repetition of erasure and write occur.
The physical deterioration in the gate dielectric film triggers retention failure. Namely, electric charges (e.g., electrons) are emitted from a floating gate in short time and data is destroyed. The number of writes (hereinafter, “write count”) to the NAND flash memory is up to about 105. To deal with the limited write count, a refresh operation and wear leveling are performed. The refresh operation is an operation for reading data from a memory cell once and for restoring data identical with the read data to the memory cell. The wear leveling is an operation for leveling the number of erasures (hereinafter, “erase count”) by exchanging a physical address of a block having a high erase count with that of a block having a low erase count.
Moreover, in the NAND memory, data is read from selected memory cells by applying high voltage to gates of unselected memory cells (including unselected memory cells at pages other than read target pages). Since the high voltage is repeatedly applied to the unselected memory cells whenever a data read operation is performed, charges enter floating gates. As a result, data stored in the memory cells is destroyed. This phenomenon is called “read disturbance”.
Conventionally, error correction has been made using ECC (Error-Correcting Code) to prevent the read disturbance. However, to correct many error bits, a large-capacity ECC circuit is necessary. Further, because of miniaturization of the memory device and multiplication of levels for storing information of two bits or more in one cell, a larger-capacity ECC circuit is necessary.